Wodel: A Domain-Specific Language for Model Mutation

This page presents Wodel examples for logic circuits. The corresponding metamodel is available here: Logic Circuit Ecore.

These examples implement the high-level change operations for logic circuits described in the referenced work.

Changes a two-input gate to a different gate type [lc]:

retype one [AND, OR] as [AND, OR]

Swaps the input connections of two different gates [lc]:

g0 = select one Gate
modify one Gate where {self <> g0} with {swapref(input, g0->input)}

Removes a NOT gate [lc]:

n0 = select one NOT where {input->src <> null and output->tar <> null}
i0 = select one InputPin in n0->output->tar
o0 = select one OutputPin in n0->input->src
modify i0 with {src = o0}
remove n0

Adds a NOT gate [lc]:

g0 = select one Gate where {input <> null and output <> null}
n1 = create NOT with {name = random-string(2, 4)}
o0 = select one OutputPin in g0->output
i0 = select one InputPin in o0->tar
create OutputPin in n1->output 
    with {name = random-string(2, 4), tar = i0}
create InputPin in n1->input 
    with {name = random-string(2, 4), src = o0}

Download all the Wodel examples for logic circuits here.
Logic Circuits samples (ZIP)
Logic Circuits samples (TAR.GZ)

Acknowledgements

This work was funded by the Spanish Ministry of Science through project “MASSIVE” (RTI2018-095255-B-I00), and by the R&D programme of the Madrid Region through project “FORTE” (P2018/TCS-4314).